Gate-Level Simulation of Quantum Circuits

While thousands of experimental physicists and chemists are currently trying to build scalable quantum computers, it appears that simulation of quantum computation will be at least as critical as circuit simulation in classical VLSI design. However, since the work of Richard Feynman in the early 1980s little progress was made in practical quantum simulation. Most researchers focused on polynomial-time simulation of restricted types of quantum circuits that fall short of the full power of quantum computation. Simulating quantum computing devices and useful quantum algorithms on classical hardware now requires excessive computational resources, making many important simulation tasks infeasible. In this work we propose a new technique for gate-level simulation of quantum circuits which greatly reduces the difficulty and cost of such simulations. The proposed technique is implemented in a simulation tool called the Quantum Information Decision Diagram (QuIDD) and evaluated by simulating Grover's quantum search algorithm. The back-end of our package, QuIDD Pro, is based on Binary Decision Diagrams, well-known for their ability to efficiently represent many seemingly intractable combinatorial structures. This reliance on a well-established area of research allows us to take advantage of existing software for BDD manipulation and achieve unparalleled empirical results for quantum simulation

Fault Testing for Reversible Circuits

Applications of reversible circuits can be found in the fields of low-power computation, cryptography, communications, digital signal processing, and the emerging field of quantum computation. Furthermore, prototype circuits for low-power applications are already being fabricated in CMOS. Regardless of the eventual technology adopted, testing is sure to be an important component in any robust implementation. We consider the test set generation problem. Reversibility affects the testing problem in fundamental ways, making it significantly simpler than for the irreversible case. For example, we show that any test set that detects all single stuck-at faults in a reversible circuit also detects all multiple stuck-at faults. We present efficient test set constructions for the standard stuck-at fault model as well as the usually intractable cell-fault model. We also give a practical test set generation algorithm, based on an integer linear programming formulation, that yields test sets approximately half the size of those produced by conventional ATPG.Comment: 30 pages, 8 figures. to appear in IEEE Trans. on CA

Removing constant‐induced errors in stochastic circuits

Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/163790/1/cdt2bf00226.pd

The UAE\u27s tourism competitiveness: A business perspective

© 2019 Elsevier Ltd The United Arab Emirates (UAE) is one of the most popular tourism destinations and the most competitive in the Middle East and North Africa region. Currently, the country aims to reach its full potential to better compete on a global scale. This paper examines factors influencing the competitiveness of the UAE as a tourism destination from the business perspective. The data were collected from a convenience sample of 311 business entrepreneurs and analyzed using a hierarchical regression. The results suggest that destination resources, destination infrastructure and support services, and the general business environment have a significant influence on the UAE\u27s tourism competitiveness. The implications of the study\u27s results are discussed

On the Equivalence of Regular Expressions

Coordinated Science Laboratory was formerly known as Control Systems LaboratoryJoint Services Electronics Program / DAAB-07-67-C-0199NSF GK-166